The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that does not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted to be prior art against the present disclosure.
In existing communication systems, forward error correction (FEC) is widely used for data transmission. For example, a transmitter usually employs an FEC scheme to send parity data bits in addition to the actual data bits, and the receiver performs the reverse FEC scheme to recognize the portion of the actual data bits from the received data bits. At the receiver, the LLR values of the received data bits are sent to the FEC, before the LLR values are sent to a decoder. In particular, a high LLR value corresponds to high reliability of the respective data bit, e.g., the data bit is less affected by channel noise and is more likely to be accurately decoded. On the contrary, a low LLR value (e.g., close to zero) corresponds to low reliability, e.g., the received data bit can be ambiguous for decoders. The LLR values corresponding to received data bits at a receiver may vary significantly, due to varying channel conditions, different modulation and coding schemes (MCSs), changing signal power level of the received signal, and/or the like. Thus, it remains challenging for a decoder to maintain decoding accuracy for certain data bits when the LLR values are relatively low (e.g., close to zero).